Job Description

Lattice Overview

Lattice Semiconductor (NASDAQ: LSCC) is the global leader in smart connectivity solutions, providing market leading intellectual property and low-power, small form-factor devices that enable more than 8,000 global customers to quickly deliver innovative and differentiated cost and power efficient products.

The Company\'s broad, end-market exposure solves customer problems across the network from the Edge to the Cloud for clients in consumer electronics, industrial equipment, communications infrastructure, computing and automotive. Our technology, long-standing relationships and commitment to world-class support enables our customers to quickly and easily unleash innovative solutions to create a smart, secure and connected world.

Our control, connect and compute solutions enable the Internet of Things to operate safely, easily and more autonomously at the edge of the network core. While you may not see our products, you are interacting with them all day, every day. We make your experience smarter and better-connected. Join Team Lattice\xe2\x80\xa6and help us continue to drive innovation that creates a smarter, better-connected world. Together, we enable what\xe2\x80\x99s next.

Responsibilities & Skills

As a Verification Eng., you will work with IP architect to understand IP features, create testbench architecture plan, work with IP designers to develop testplan, perform detailed testing of IP features and ensure coverage is met. You will need to ensure the IP is compatible with industry standard synthesis & simulator tools. You will also co-ordinate with IP designer on IP release mechanism for testing. You are also expected to develop scripts in Python and other script language to automate the soft IP development and testing process.

Key Skills

• At least 3-5 years Digital Design Verification Related Experience
• Bachelor or Masters Degree in Computer Science, Computer Engineering, Electronics and Electrical Engineer
• Skill in debugging and analyzing complex digital design
• Experience in HDL and HVL Languages and Methodologies
• Knowledge in ASIC/FPGA/SoC verification or development cycle
• Knowledge in simulation tools like Cadence IES/XCELIUM, Synopsys VCS or Mentor\'s Questa
• Hands-on experience in Python, Perl or Shell Scripting, TCL and Make.
• Strong communication, analytical and documentation skills and ability to interface with other groups/site
• Programming skills (e.g.: C/C++, Perl, TCL or Python)
• Experience in PCIE protocols
• Experience in hardware validation and debug is a plus

• Medical (HMO), dental, vision effective on date of hire
• Well-being Programs, Tuition Reimbursement and more

Lattice Semiconductor