Design Verification Lead/manager

Pulau Pinang, Malaysia

Job Description


Job Summary: We are seeking a highly skilled and experienced technical lead/manager to join our dynamic team. The successful candidate will be responsible for leading the pre-silicon design verification activities for cutting-edge semiconductor products. This role requires a deep understanding of verification methodologies, strong technical leadership skills, and the ability to collaborate effectively with cross-functional teams. Key Responsibilities: 1. Lead the pre-silicon design verification efforts, ensuring the successful execution of verification plans and meeting project milestones. 2. Develop and implement verification strategies and methodologies to ensure the highest quality of our semiconductor products. 3. Define and drive the verification architecture, including test benches, test cases, and coverage metrics. 4. Collaborate closely with design teams to understand design specifications and ensure comprehensive verification coverage. 5. Mentor and provide technical guidance to the verification team, promoting best practices and continuous improvement. 6. Review and analyze verification results, identifying and resolving issues in a timely manner. 7. Drive the adoption of industry-standard verification methodologies and tools to enhance team productivity and efficiency. 8. Collaborate with cross-functional teams, including design, software, and system engineering, to ensure seamless integration of verification efforts. 9. Stay up-to-date with the latest advancements in verification methodologies, tools, and techniques, and drive their adoption as appropriate. 10. Contribute to the continuous improvement of the overall verification process, identifying areas for optimization and implementing necessary changes. Qualifications: 1. Bachelor\'s or Master\'s degree in Electronics Engineering, Computer Science, or a related field. 2. Minimum of 7 years of experience in pre-silicon design verification. Experience in leading and managing verification teams is a plus. 3. Strong expertise in verification methodologies such as SystemVerilog, and UVM. Experience in formal verification, linting, or gate-level simulation is a plus. 4. Familiar with Linux OS, and proficient in scripting e.g. Perl, Python or C++. 5. Proficiency in verification tools, such as Cadence Incisive, Siemens Questa, or Synopsys VCS. 6. Experience in industry-standard protocols and interfaces e.g. PCIe, DDR, Ethernet, USB or FPGA architecture is a plus. 7. Solid understanding of digital design concepts and ASIC/FPGA design flow. 8. Strong leadership and project management skills, with the ability to prioritize tasks and meet deadlines. 9. Excellent communication and collaboration skills, with the ability to work effectively in a cross-functional team environment. 10. Proven ability to analyze and solve complex technical problems, with a keen attention to detail. 11. Self-motivated and proactive, with a passion for continuous learning and professional development.

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Job Detail

  • Job Id
    JD999752
  • Industry
    Not mentioned
  • Total Positions
    1
  • Job Type:
    Full Time
  • Salary:
    Not mentioned
  • Employment Status
    Permanent
  • Job Location
    Pulau Pinang, Malaysia
  • Education
    Not mentioned