Responsibilities: Accountable for path finding, defining architectural/micro architecture specifications, RTL development and SDC modelling for multiple blocks and sub-systems to ensure a fully functional and robust IP design. The candidate will be involved in customer discussions and working with other architects to scope out the customer\'s features requirements and use cases into specifications. The candidate will be involved with the customer discussions throughout the development right up the customer bringups. Accountable to lead and train other junior Digital Circuit Designers and ensure proper methodologies, documentations and framework are in place to ensure smooth executions. Support the Application teams and potential customers in integrating IPs into their system. Experience in FPGA System Development will be an added advantage Requirements : Bachelor or Master degree in Electrical & Electronics Engineering or Microelectronics Engineering. Minimum of 10 years experience in Digital Circuit Design with exposure to Architecture, strong RTL coding, Simulation, Synthesis, STA, Board level integration and Verification. Must have exposure to implementing high speed mix signal designs.
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