The Process Design Kit (PDK) Development team within Design Enablement (DE) organization is looking for talented individuals to work in Runset, Extraction, or Custom Layout and architecture domain. At Intel, Design Enablement is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable design teams to get to market faster with leadership products on innovative technologies. As part of the DE/PDK group, you will join a highly motivated team of talented engineers solving challenging technical problems, enabling PDKs for Intel\'s most advanced process technologies, and drive PDKs towards industry standard methods and ease of use for the end customers. The job requires partnering and leveraging domain experts across various areas of Technology Development, EDA vendors, and product design teams to develop and deliver high quality technology collaterals, models, and enablement of EDA tools. As PDK Development Engineer, you will be responsible for, but not limited to the following: - Develop physical layout verification design rule checker (DRC), Layout vs Schematic (LVS), and RC extraction runsets using industry standard EDA tools (Synopsys ICV, Siemens/Mentor Calibre, and Cadence Pegasus). - Work with the process development teams at Intel to define specifications for DRC, LVS, and RC extraction runsets. - Perform detailed evaluation of tool run results to validate proper tool behavior and identify root cause for any discrepancies found. - Develop new extraction techniques to address upcoming technology features not yet handled in existing industry extraction tools and validates EDA solutions against models and measured data. - Develop ESD/LU rule decks based on Design Rule Manual (DRM) requirements. - Creating reliability ESD and LU design rules specifications. - L0 or development quality assurance of custom layout EDA technology files and/or primitive libraries and other custom collateral used by industry standard custom design and layout for various Intel process nodes. - Develop and enhance automation software and scripts for tool regression and collateral generation, including quality check. - Engage with internal partners and external EDA vendors to coordinate tool feature requirements and specification. - Coordinate development of technology features, develop QA plans, and drive test-cases development working with relevant stakeholders. - Help library teams at Intel with technology path finding activities. - Manage and resolve internal/external customer tickets as per guidelines. #DesignEnablement
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