Job Description

We are looking for a Senior Physical Design Engineer to join the team. Physical design engineer provides expertise and contribution to all aspects of the SoC design flow from high-level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.Responsibilities:

• Own execution from synthesis to place and route of partitions through all signoff including timing signoff, physical verification, EMIR signoff,
• Formal Equivalence, and Low Power Verification.

Responsible for Timing & Power critical IPs\xe2\x80\x99 execution with PPA (Power, Performance and Area) focused. * Responsible for RTL to GDS implementation in Physical Design domain.Coordinate with CAD, RTL/Design teams, Architecture team, Power& Performance team, Technology team & other internal/external partners. * Lead & Influence in TFM (Tools, Flows, and Methodology) & PPAS (Power, Performance, Area & Schedule) for design construction to signoff.

• Demonstrate technical expertise across various domains of Physical Design & Timing Signoff (E2E).
• Clear communications on project status & planning.
• Collaborate across various geographic locations based on need.

Qualifications:Required/Minimum Qualifications

• 7+ years of related technical engineering experience

• OR Bachelor\'s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
• OR Master\'s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience
• OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 7+ years of experience in semiconductor design.

Preferred Qualifications

• Experience with PD flows bring up/setup/flow flush, overall know how of PD-TFM and PD methodology
• Collaborating and influencing various aspects of PD Methodology focused on PPA
• In-depth understanding of design tradeoffs for power, performance, and area (PPA)
• Analyzing Power, Area, and Timing (PPA) trade offs for new tech nodes & enabling project level decisions. This involves from deeper understanding of circuits, metal stack analysis, Power grid planning and other aspects which influence PPA goals.
• Automation skills using scripting languages such as Perl, TCL, or Python

Understanding of constraints generation, STA, timing optimization, and timing closure. * Demonstrate technical expertise in all aspects of Physical Design, from synthesis to place and route of partitions through all signoff including timing signoff, physical verification, EMIR signoff , Formal Equivalence, and Low Power Verification.

• Experience in EDA tools such as Primetime, StarRC, Cadence and/or Synopsys PnR tools etc.
• Effective communication, collaboration, teamwork skills and ability to contribute to diverse and inclusive teams.
• Large SoC/CPU/IP design tape-out experience in the latest foundry process nodes is a plus

Customer obsessedWe will learn about our customers and their businesses with a beginner\xe2\x80\x99s mind and then bring solutions that meet their needs. We will be insatiable in our desire to learn from the outside and bring it into Microsoft, while still innovating to surprise and delight our users.Diverse & inclusiveThe world is diverse. We will better serve everyone on the planet by representing everyone on the planet. We will be open to learning our own biases and changing our behaviors, so we can tap into the collective power of everyone at Microsoft. We don\xe2\x80\x99t just value differences, we seek them out, we invite them in. And as a result, our ideas are better, our products are better, and our customers are better served.One MicrosoftWe are a family of individuals united by a single, shared mission. It\xe2\x80\x99s our ability to work together that makes our dreams believable and ultimately achievable. We will build on the ideas of others and collaborate across boundaries to bring the best of Microsoft to our customers as one. We are proud to be part of team Microsoft.Making a differenceIf we commit to being customer obsessed, becoming more diverse and inclusive, and operating as One Microsoft, we will achieve our mission to empower every person and organization on the planet. Beyond that, we will make a difference and find deep meaning in our work. We stand in awe of what humans dare to achieve and are motivated every day to empower others to do more and achieve more through our technology and innovation.We fundamentally believe that we need a culture founded in a Growth Mindset. It starts with a belief that everyone can grow and develop; that potential is nurtured, not pre-determined; and that anyone can change their mindset.Other RequirementsAbility to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the .

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