Job Description

Expatriates are welcome

Participate in block/IP/chip floor planning from scratch, performing routing & layout verification (such as LVS, DRC, Antenna & others) and troubleshooting the results Conduct thorough layout design reviews internally & external review with circuit designers Extensive use of CAD tools (

Cadence Virtuoso--VXL & Mentor Calibre

) in IP/chip integration and verification Co-lead/lead the physical layout of IP/full chip design by working closely with cross functional team leader Experienced and capable in guiding junior engineers

Job Requirements:

Degree in electrical/Electronic Engineering/Physics with VLSI exposure or equivalent at least 8 years of job experience in layout design field is preferred. Hands-on experience in

analog layout from scratch, implementation of analog layout techniques, IR drop/EM analysis

Deep understanding of analog circuit layout concepts in submicron CMOS technologies Willing to work in Bayan Lepas Penang, Malaysia
Job Types: Full-time, Permanent

Pay: RM9,000.00 - RM13,000.00 per month

Benefits:

Health insurance Opportunities for promotion Professional development
Work Location: In person