Job Description

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WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the worlds most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE:
This engineer plays a key role in SoC Design flow, he/she will mainly focus on DFXIP and functional IP integration, DFX full-chip level design and integration, RTL quality check, ECO implementation and formality check. Moreover, he/she is expected to support leading project new features landing and execution, and provide strong technical supports for Feint, PD and other DFX functional domain owners.
THE PERSON:
Good team worker with solid Verilog RTL design knowledge/experience. Knowledge reservation on Scan/BIST/STA will be a strong plus.
KEY RESPONSIBILITIES:

• Cutting-edge test strategies study and implementation.
• Cutting-edge IP study (both DFT and non-DFT designs ) and test plan development.
• DFT/DFD IP integration.
• Plan/Implement block/chip level DFT and DFD RTL designs basing on Floor Plan.
• Support RTL quality check and documentation tasks.
• Co-work with Front End and PD for synthesis optimization and smooth timing signoff.
• Implement Functional ECO and formality check.
• Collaborate with SoC/DFX Arch to support DFX new design features landing

PREFERRED EXPERIENCE:

• Solid background on process, device or ASIC design.
• Strong technical background in Verilog coding.
• Good knowledge on testbench setup, maintenance and checker development will be a strong plus.
• Proven knowledge and expertise on two or more fields of SCAN, MBIST, RTL design, STA and DV.
• Experience in Synthesis, formal/LEC, or CDC will be a plus.
• Good command of two or more standard EDA tools, and has solid knowledge on state of the art test strategies.
• Strong programming and scripting skills in Perl, Tcl or Python will be a strong plus.
• Good communication skills (both English and Mandarin) and self-driven, willing to learn/share.

ACADEMIC CREDENTIALS:

• Master degree with 3 ~ 8 years or Bachelor with 5 ~ 10 years experience.

LOCATION:
Penang, Malaysia
#LI-JK1
#LI-Hybrid
Benefits offered are described: .
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process. '