Participate in block/IP/chip floor planning from scratch, performing routing &
layout verification (such as LVS, DRC, Antenna & others) and troubleshooting the
results
Conduct thorough layout design reviews internally & external review with
circuit designers
Extensive use of CAD tools (Cadence Virtuoso--VXL & Mentor Calibre) in IP/chip
integration and verification
Capable in guiding/coaching junior engineers for on time delivery & quality
Job Requirements:
Bachelor's degree in electrical/Electronic Engineering/Physics with VLSI
exposure or minimum 4 years of job experience in layout design field is
preferred.
Hands-on experience in analog layout from scratch, implementation of
analog layout techniques, IR drop/EM analysis
Deep understanding of analog circuit layout concepts in submicron CMOS
technologies
Possess strong technical, analytical & problem-solving skills in layout design
Ability to work as strong team player and participate in cross-functional activities
Good interpersonal, verbal and communication skill with good initiative at work
Job Types: Full-time, Permanent
Pay: RM6,000.00 - RM15,000.00 per month
Benefits:
Opportunities for promotion
Professional development
Work Location: In person
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