and Requirements
At Synopsys, we are enthusiastic learners and seasoned inventors. We are makers and visionaries who make technology safer. We are innovators who develop the software and hardware that drive the world\'s high-performing chips for amazing things like autonomous vehicles, smart homes, and machines that learn. We embrace diversity as a company, so we can create solutions that serve not just technology but the humans behind it.
The successful candidate will join a talented Synopsys SLM development team and will have the challenging technical opportunity on various ASIC CAD flow developments and deployments.
More than 4+ years of Develop and support RTL synthesis/DFT, Fusion, STA and LEC design methodologies & flows automation
Create, release, and maintain standard design scripts to automate EDA tools & flows involves on Synopsys Design tools
Experience in physical design and verification with knowledge in blocks to timing, timing closure as well as pick and place route.
Fluency in scripting languages (TCL, PERC, Python) and ability to develop tools for ASIC automation.
Excellent analytical, problem solving and debugging skills with strong interest in semiconductor technology.
Requirements
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