Job Description

Lattice Overview

Lattice Semiconductor (NASDAQ: LSCC) is the global leader in smart connectivity solutions, providing market leading intellectual property and low-power, small form-factor devices that enable more than 8,000 global customers to quickly deliver innovative and differentiated cost and power efficient products.

The Company\'s broad, end-market exposure solves customer problems across the network from the Edge to the Cloud for clients in consumer electronics, industrial equipment, communications infrastructure, computing and automotive. Our technology, long-standing relationships and commitment to world-class support enables our customers to quickly and easily unleash innovative solutions to create a smart, secure and connected world.

Our control, connect and compute solutions enable the Internet of Things to operate safely, easily and more autonomously at the edge of the network core. While you may not see our products, you are interacting with them all day, every day. We make your experience smarter and better-connected. Join Team Lattice\xe2\x80\xa6and help us continue to drive innovation that creates a smarter, better-connected world. Together, we enable what\xe2\x80\x99s next.

Responsibilities & Skills



We are seeking a Senior IP Design engineer, passionate individual with technical leadership capabilities to build Connectivity IP portfolios for Lattice FPGA. The individual should have the ability to work closely with architect to translate specifications into high-speed RTL design, for the best Performance, Power and logic utilization.

Key Skills

• Experience in high speed SERDES protocols (e.g.: PCIe, Ethernet, CPRI or JESD204B/C) or Peripherals (SPI, I2C or I3C) is a plus.
• Hands-on experience in FPGA RTL design, logic verification, debug and timing closure is preferred
• Programming skills (e.g.: C/C++, Perl, TCL or Python).
• Experience in hardware validation or hardware interoperability test is a plus.
• Experience in soft IP packaging, example design and testbench development will be an added advantage.

• BS/MS/PhD in Electronics or Computer Engineering minimum of 2 years of FPGA IP design experience.
• Independent and self-motivated, capable of executing under dynamic environment and uncertainties

• Medical (HMO), dental, vision effective on date of hire
• Well-being Programs, Tuition Reimbursement and more

Lattice Semiconductor