Solutions Engineer, Sr Staff

Pulau Pinang, Malaysia

Job Description


and Requirements

At Synopsys, we are enthusiastic learners and seasoned inventors. We are makers and visionaries who make technology safer. We are innovators who develop the software and hardware that drive the world\'s high-performing chips for amazing things like autonomous vehicles, smart homes, and machines that learn. We embrace diversity as a company, so we can create solutions that serve not just technology but the humans behind it.

Seeking a highly motivated and experienced Technical Full chip Integration Engineer with a passion for innovation and top-notch execution. The candidate will be working with a highly experienced digital and mixed-signal SoC team. Excellent theoretical and practical background in physical design, integration, and verification is highly desirable. You will own chip level place and route (PnR), final gds/oasis/def database construction and verification. You will develop and validate Power Grid, including routability analysis. Drive hard IP integration, full-chip level EM/IR and interface timing closure. You will work with the implementation/CAD teams during the entire chip design cycle to drive signoff closure for tapeout. Work with SOC team to meet IP technical and delivery requirements,

Key Qualifications
MSEE or BSEE with 10+ years of physical (digital) design and full chip signoff verification experience in the industry.

  • Deep knowledge of the ASIC development flow, including architecture specification, digital design, physical implementation, and verification, as well as signoff.
  • Must have experience in top-level floorplanning, block integration, partitioning, budgeting, and place and route
  • Must have experience in EMIR , SIGEM analysis, physical PDV, DRC/LVS verification, and DFM
  • Working knowledge of extraction, STA methodology and formal verification tools
  • Must have experience in scripting.
  • Experience in test chip and production silicon debugs is a plus.
  • Proven leadership and team-building skills, able to motivate others and nurture a culture of quality, ownership, and continuous improvement.
  • Collaborative approach and ability to develop excellent alliances cross-functionally.
  • Excellent communication, organization, and time management skills
Our Silicon Design & Verification business is all about building high-performance silicon chips-faster. We\'re the world\'s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance-eliminating months off their project schedules.
At Synopsys, we\'re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we\'re powering it all with the world\'s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Stay Connected: Join our Talent Community
Synopsys has adopted a COVID-19 vaccination policy to safeguard the health and well-being of our employees and visitors. As a condition of employment, all employees based in the U.S. are required to be fully vaccinated for COVID-19, unless a reasonable accommodation is approved or as otherwise required by law.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

Hire Type

Employee

Job Category

Engineering

Job Subcategory

Solutions Engineering

Synopsys

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Job Detail

  • Job Id
    JD925489
  • Industry
    Not mentioned
  • Total Positions
    1
  • Job Type:
    Full Time
  • Salary:
    Not mentioned
  • Employment Status
    Permanent
  • Job Location
    Pulau Pinang, Malaysia
  • Education
    Not mentioned