and Requirements
At Synopsys, we are enthusiastic learners and seasoned inventors. We are makers and visionaries who make technology safer. We are innovators who develop the software and hardware that drive the world\'s high-performing chips for amazing things like autonomous vehicles, smart homes, and machines that learn. We embrace diversity as a company, so we can create solutions that serve not just technology but the humans behind it.
Seeking a highly motivated and experienced Technical Full chip Integration Engineer with a passion for innovation and top-notch execution. The candidate will be working with a highly experienced digital and mixed-signal SoC team. Excellent theoretical and practical background in physical design, integration, and verification is highly desirable. You will own chip level place and route (PnR), final gds/oasis/def database construction and verification. You will develop and validate Power Grid, including routability analysis. Drive hard IP integration, full-chip level EM/IR and interface timing closure. You will work with the implementation/CAD teams during the entire chip design cycle to drive signoff closure for tapeout. Work with SOC team to meet IP technical and delivery requirements,
Key Qualifications
MSEE or BSEE with 10+ years of physical (digital) design and full chip signoff verification experience in the industry.
MNCJobz.com will not be responsible for any payment made to a third-party. All Terms of Use are applicable.