and Requirements
At Synopsys, we are enthusiastic learners and seasoned inventors. We are makers and visionaries who make the technology safer. We are innovators who develop the software and hardware that drive the world's high-performing chips for amazing things like autonomous vehicles, smart homes, and machines that learn. We embrace diversity as a company, so we can create solutions that serve not just technology but the humans behind it.
Seeking a highly motivated Senior Manager with a passion for innovation and top-notch execution. The candidate will be leading a highly experienced flow, automation, methodology, and implementation team. Excellent theoretical and practical background in IO subsystems, and chip design infrastructure is highly desirable.
This position plays a very strategic and highly visible role that has global responsibility for our world-class engineering teams responsible for developing Synopsys' IP Solutions and Test team. You will be responsible for flow, methodologies, QA, and infrastructure for test chip design, implementation, and post-silicon validation.
This opportunity provides an endless list of complex challenges that will require excellent problem-solving abilities and a winning mindset. You will be part of a world-class team of engineers responsible for delivering high-end HW solutions from specification development to performing functional and performance tests on prototype test chips.
Key Qualifications
MSEE or BSEE with 15+ years of digital design and verification experience in the industry.
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