Agensi Pekerjaan Executive Rec
Location:
Petaling Jaya (47810) -
Salary:
6000
Type:
Permanent
Main Industry:
Job ID:
123891733
Company:
Agensi Pekerjaan Executive Recruiters Sdn Bhd
Posted On:
27 October 2022
Job Responsibilities:
-Take part in block/IP/chip floor planning from beginning, undertake routing & layout verification (LVS, DRC, antenna & others), and analyze the outcomes.
-Working closely with the cross-functional team leader, co-lead or lead the physical layout of IP/full chip design.
-Perform rigorous internal and external layout design assessments with circuit designers.
-Extensive usage of CAD tools for IP/chip integration and verification (cadence virtuoso VXL and mentor calibre)
-Able to mentoring/coaching junior engineers to ensure quality and on-time delivery
Requirements
Job Requirements:
-A minimum degree in Electrical/Electronic Engineering/physics with VLSI exposure or any equivalent of 9 to 15 years of job experience in analog layout design.
-Practical knowledge of analogue layout from beginning. HV layout expertise and knowledge would be useful.
-Profundity in submicron CMOS technologies analogue circuit layout concepts.
-Have excellent technical, analytical, and problem-solving abilities for designing analogue layouts.
-The capacity to be a good team player and take part in activities involving several functions
-Possessing strong verbal, verbal and interpersonal skills as well as strong initiative at work
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